As electrical power dissipation increases in electronic integrated circuits (IC) or photonic integrated circuit (PIC), keeping the operational temperatures of every component of a semiconductor chip device within an acceptable range using traditional electronic packaging methods becomes increasingly more difficult.
IC devices are typically bonded to a substrate of some kind, which includes electrical traces extending out to the edge of the package with additional electronic components connected along the way. If the power dissipation of the device is high, the substrate may be bonded to a heat sink for dissipating heat. However, the interface between the substrate and the heat sink can prove to be a significant thermal barrier, thereby increasing operational temperatures beyond what is required by the device to operate efficiently. Furthermore, it is usually only possible to direct the excess heat from the device along one interface, e.g. toward the heat sink. With a mixture of components, which are bonded in a variety of different ways, e.g. ball grid array (BGA) and direct bonding methods, optimally dissipating heat from all the components on the substrate becomes increasingly more difficult.
An object of the present invention is to overcome the shortcomings of the prior art by providing a heat sink for a dual-sided semiconductor chip device.